279 lines
11 KiB
TableGen
279 lines
11 KiB
TableGen
//===- PTXInstrLoadStore.td - PTX Load/Store Instruction Defs -*- tablegen-*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the PTX load/store instructions in TableGen format.
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//
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//===----------------------------------------------------------------------===//
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// Addressing Predicates
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// We have to differentiate between 32- and 64-bit pointer types
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def Use32BitAddresses : Predicate<"!getSubtarget().is64Bit()">;
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def Use64BitAddresses : Predicate<"getSubtarget().is64Bit()">;
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//===----------------------------------------------------------------------===//
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// Pattern Fragments for Loads/Stores
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//===----------------------------------------------------------------------===//
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def load_global : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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const Value *Src;
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const PointerType *PT;
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if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
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(PT = dyn_cast<PointerType>(Src->getType())))
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return PT->getAddressSpace() == PTXStateSpace::Global;
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return false;
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}]>;
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def load_constant : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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const Value *Src;
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const PointerType *PT;
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if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
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(PT = dyn_cast<PointerType>(Src->getType())))
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return PT->getAddressSpace() == PTXStateSpace::Constant;
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return false;
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}]>;
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def load_shared : PatFrag<(ops node:$ptr), (load node:$ptr), [{
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const Value *Src;
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const PointerType *PT;
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if ((Src = cast<LoadSDNode>(N)->getSrcValue()) &&
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(PT = dyn_cast<PointerType>(Src->getType())))
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return PT->getAddressSpace() == PTXStateSpace::Shared;
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return false;
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}]>;
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def store_global
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: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
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const Value *Src;
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const PointerType *PT;
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if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
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(PT = dyn_cast<PointerType>(Src->getType())))
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return PT->getAddressSpace() == PTXStateSpace::Global;
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return false;
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}]>;
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def store_shared
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: PatFrag<(ops node:$d, node:$ptr), (store node:$d, node:$ptr), [{
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const Value *Src;
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const PointerType *PT;
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if ((Src = cast<StoreSDNode>(N)->getSrcValue()) &&
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(PT = dyn_cast<PointerType>(Src->getType())))
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return PT->getAddressSpace() == PTXStateSpace::Shared;
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return false;
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}]>;
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// Addressing modes.
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def ADDRrr32 : ComplexPattern<i32, 2, "SelectADDRrr", [], []>;
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def ADDRrr64 : ComplexPattern<i64, 2, "SelectADDRrr", [], []>;
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def ADDRri32 : ComplexPattern<i32, 2, "SelectADDRri", [], []>;
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def ADDRri64 : ComplexPattern<i64, 2, "SelectADDRri", [], []>;
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def ADDRii32 : ComplexPattern<i32, 2, "SelectADDRii", [], []>;
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def ADDRii64 : ComplexPattern<i64, 2, "SelectADDRii", [], []>;
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def ADDRlocal32 : ComplexPattern<i32, 2, "SelectADDRlocal", [], []>;
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def ADDRlocal64 : ComplexPattern<i64, 2, "SelectADDRlocal", [], []>;
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// Address operands
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def MEMri32 : Operand<i32> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops RegI32, i32imm);
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}
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def MEMri64 : Operand<i64> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops RegI64, i64imm);
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}
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def LOCALri32 : Operand<i32> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops i32imm, i32imm);
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}
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def LOCALri64 : Operand<i64> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops i64imm, i64imm);
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}
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def MEMii32 : Operand<i32> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops i32imm, i32imm);
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}
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def MEMii64 : Operand<i64> {
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let PrintMethod = "printMemOperand";
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let MIOperandInfo = (ops i64imm, i64imm);
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}
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// The operand here does not correspond to an actual address, so we
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// can use i32 in 64-bit address modes.
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def MEMpi : Operand<i32> {
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let PrintMethod = "printParamOperand";
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let MIOperandInfo = (ops i32imm);
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}
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def MEMret : Operand<i32> {
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let PrintMethod = "printReturnOperand";
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let MIOperandInfo = (ops i32imm);
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}
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// Load/store .param space
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def PTXloadparam
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: SDNode<"PTXISD::LOAD_PARAM", SDTypeProfile<1, 1, [SDTCisPtrTy<1>]>,
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[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>;
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def PTXstoreparam
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: SDNode<"PTXISD::STORE_PARAM", SDTypeProfile<0, 2, [SDTCisVT<0, i32>]>,
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[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>;
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def PTXreadparam
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: SDNode<"PTXISD::READ_PARAM", SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>,
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[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>;
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def PTXwriteparam
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: SDNode<"PTXISD::WRITE_PARAM", SDTypeProfile<0, 1, []>,
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[SDNPHasChain, SDNPOutGlue, SDNPOptInGlue]>;
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//===----------------------------------------------------------------------===//
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// Classes for loads/stores
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//===----------------------------------------------------------------------===//
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multiclass PTX_LD<string opstr, string typestr,
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RegisterClass RC, PatFrag pat_load> {
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def rr32 : InstPTX<(outs RC:$d),
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(ins MEMri32:$a),
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!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (pat_load ADDRrr32:$a))]>,
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Requires<[Use32BitAddresses]>;
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def rr64 : InstPTX<(outs RC:$d),
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(ins MEMri64:$a),
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!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (pat_load ADDRrr64:$a))]>,
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Requires<[Use64BitAddresses]>;
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def ri32 : InstPTX<(outs RC:$d),
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(ins MEMri32:$a),
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!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (pat_load ADDRri32:$a))]>,
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Requires<[Use32BitAddresses]>;
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def ri64 : InstPTX<(outs RC:$d),
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(ins MEMri64:$a),
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!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (pat_load ADDRri64:$a))]>,
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Requires<[Use64BitAddresses]>;
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def ii32 : InstPTX<(outs RC:$d),
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(ins MEMii32:$a),
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!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (pat_load ADDRii32:$a))]>,
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Requires<[Use32BitAddresses]>;
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def ii64 : InstPTX<(outs RC:$d),
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(ins MEMii64:$a),
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!strconcat(opstr, !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (pat_load ADDRii64:$a))]>,
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Requires<[Use64BitAddresses]>;
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}
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multiclass PTX_ST<string opstr, string typestr, RegisterClass RC,
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PatFrag pat_store> {
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def rr32 : InstPTX<(outs),
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(ins RC:$d, MEMri32:$a),
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!strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
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[(pat_store RC:$d, ADDRrr32:$a)]>,
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Requires<[Use32BitAddresses]>;
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def rr64 : InstPTX<(outs),
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(ins RC:$d, MEMri64:$a),
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!strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
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[(pat_store RC:$d, ADDRrr64:$a)]>,
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Requires<[Use64BitAddresses]>;
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def ri32 : InstPTX<(outs),
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(ins RC:$d, MEMri32:$a),
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!strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
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[(pat_store RC:$d, ADDRri32:$a)]>,
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Requires<[Use32BitAddresses]>;
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def ri64 : InstPTX<(outs),
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(ins RC:$d, MEMri64:$a),
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!strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
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[(pat_store RC:$d, ADDRri64:$a)]>,
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Requires<[Use64BitAddresses]>;
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def ii32 : InstPTX<(outs),
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(ins RC:$d, MEMii32:$a),
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!strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
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[(pat_store RC:$d, ADDRii32:$a)]>,
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Requires<[Use32BitAddresses]>;
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def ii64 : InstPTX<(outs),
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(ins RC:$d, MEMii64:$a),
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!strconcat(opstr, !strconcat(typestr, "\t[$a], $d")),
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[(pat_store RC:$d, ADDRii64:$a)]>,
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Requires<[Use64BitAddresses]>;
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}
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multiclass PTX_LOCAL_LD_ST<string typestr, RegisterClass RC> {
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def LDri32 : InstPTX<(outs RC:$d), (ins LOCALri32:$a),
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!strconcat("ld.local", !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (load_global ADDRlocal32:$a))]>;
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def LDri64 : InstPTX<(outs RC:$d), (ins LOCALri64:$a),
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!strconcat("ld.local", !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (load_global ADDRlocal64:$a))]>;
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def STri32 : InstPTX<(outs), (ins RC:$d, LOCALri32:$a),
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!strconcat("st.local", !strconcat(typestr, "\t[$a], $d")),
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[(store_global RC:$d, ADDRlocal32:$a)]>;
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def STri64 : InstPTX<(outs), (ins RC:$d, LOCALri64:$a),
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!strconcat("st.local", !strconcat(typestr, "\t[$a], $d")),
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[(store_global RC:$d, ADDRlocal64:$a)]>;
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}
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multiclass PTX_PARAM_LD_ST<string typestr, RegisterClass RC> {
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let hasSideEffects = 1 in {
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def LDpi : InstPTX<(outs RC:$d), (ins i32imm:$a),
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!strconcat("ld.param", !strconcat(typestr, "\t$d, [$a]")),
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[(set RC:$d, (PTXloadparam texternalsym:$a))]>;
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def STpi : InstPTX<(outs), (ins i32imm:$d, RC:$a),
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!strconcat("st.param", !strconcat(typestr, "\t[$d], $a")),
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[(PTXstoreparam texternalsym:$d, RC:$a)]>;
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}
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}
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multiclass PTX_LD_ALL<string opstr, PatFrag pat_load> {
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defm u16 : PTX_LD<opstr, ".u16", RegI16, pat_load>;
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defm u32 : PTX_LD<opstr, ".u32", RegI32, pat_load>;
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defm u64 : PTX_LD<opstr, ".u64", RegI64, pat_load>;
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defm f32 : PTX_LD<opstr, ".f32", RegF32, pat_load>;
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defm f64 : PTX_LD<opstr, ".f64", RegF64, pat_load>;
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}
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multiclass PTX_ST_ALL<string opstr, PatFrag pat_store> {
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defm u16 : PTX_ST<opstr, ".u16", RegI16, pat_store>;
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defm u32 : PTX_ST<opstr, ".u32", RegI32, pat_store>;
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defm u64 : PTX_ST<opstr, ".u64", RegI64, pat_store>;
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defm f32 : PTX_ST<opstr, ".f32", RegF32, pat_store>;
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defm f64 : PTX_ST<opstr, ".f64", RegF64, pat_store>;
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}
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//===----------------------------------------------------------------------===//
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// Instruction definitions for loads/stores
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//===----------------------------------------------------------------------===//
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// Global/shared stores
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defm STg : PTX_ST_ALL<"st.global", store_global>;
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defm STs : PTX_ST_ALL<"st.shared", store_shared>;
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// Global/shared/constant loads
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defm LDg : PTX_LD_ALL<"ld.global", load_global>;
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defm LDc : PTX_LD_ALL<"ld.const", load_constant>;
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defm LDs : PTX_LD_ALL<"ld.shared", load_shared>;
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// Param loads/stores
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defm PARAMPRED : PTX_PARAM_LD_ST<".pred", RegPred>;
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defm PARAMU16 : PTX_PARAM_LD_ST<".u16", RegI16>;
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defm PARAMU32 : PTX_PARAM_LD_ST<".u32", RegI32>;
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defm PARAMU64 : PTX_PARAM_LD_ST<".u64", RegI64>;
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defm PARAMF32 : PTX_PARAM_LD_ST<".f32", RegF32>;
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defm PARAMF64 : PTX_PARAM_LD_ST<".f64", RegF64>;
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// Local loads/stores
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defm LOCALPRED : PTX_LOCAL_LD_ST<".pred", RegPred>;
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defm LOCALU16 : PTX_LOCAL_LD_ST<".u16", RegI16>;
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defm LOCALU32 : PTX_LOCAL_LD_ST<".u32", RegI32>;
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defm LOCALU64 : PTX_LOCAL_LD_ST<".u64", RegI64>;
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defm LOCALF32 : PTX_LOCAL_LD_ST<".f32", RegF32>;
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defm LOCALF64 : PTX_LOCAL_LD_ST<".f64", RegF64>;
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