135 lines
3.2 KiB
C++
135 lines
3.2 KiB
C++
//===-- PTXBaseInfo.h - Top level definitions for PTX -------- --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains small standalone helper functions and enum definitions for
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// the PTX target useful for the compiler back-end and the MC libraries.
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// As such, it deliberately does not include references to LLVM core
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// code gen types, passes, etc..
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//
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//===----------------------------------------------------------------------===//
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#ifndef PTXBASEINFO_H
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#define PTXBASEINFO_H
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#include "PTXMCTargetDesc.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/raw_ostream.h"
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namespace llvm {
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namespace PTXStateSpace {
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enum {
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Global = 0, // default to global state space
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Constant = 1,
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Local = 2,
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Parameter = 3,
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Shared = 4
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};
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} // namespace PTXStateSpace
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namespace PTXPredicate {
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enum {
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Normal = 0,
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Negate = 1,
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None = 2
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};
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} // namespace PTXPredicate
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/// Namespace to hold all target-specific flags.
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namespace PTXRoundingMode {
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// Instruction Flags
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enum {
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// Rounding Mode Flags
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RndMask = 15,
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RndDefault = 0, // ---
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RndNone = 1, // <NONE>
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RndNearestEven = 2, // .rn
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RndTowardsZero = 3, // .rz
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RndNegInf = 4, // .rm
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RndPosInf = 5, // .rp
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RndApprox = 6, // .approx
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RndNearestEvenInt = 7, // .rni
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RndTowardsZeroInt = 8, // .rzi
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RndNegInfInt = 9, // .rmi
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RndPosInfInt = 10 // .rpi
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};
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} // namespace PTXII
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namespace PTXRegisterType {
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// Register type encoded in MCOperands
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enum {
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Pred = 0,
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B16,
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B32,
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B64,
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F32,
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F64
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};
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} // namespace PTXRegisterType
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namespace PTXRegisterSpace {
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// Register space encoded in MCOperands
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enum {
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Reg = 0,
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Local,
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Param,
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Argument,
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Return
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};
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}
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inline static void decodeRegisterName(raw_ostream &OS,
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unsigned EncodedReg) {
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OS << "%";
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unsigned RegSpace = EncodedReg & 0x7;
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unsigned RegType = (EncodedReg >> 3) & 0x7;
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unsigned RegOffset = EncodedReg >> 6;
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switch (RegSpace) {
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default:
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llvm_unreachable("Unknown register space!");
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case PTXRegisterSpace::Reg:
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switch (RegType) {
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default:
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llvm_unreachable("Unknown register type!");
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case PTXRegisterType::Pred:
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OS << "p";
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break;
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case PTXRegisterType::B16:
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OS << "rh";
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break;
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case PTXRegisterType::B32:
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OS << "r";
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break;
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case PTXRegisterType::B64:
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OS << "rd";
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break;
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case PTXRegisterType::F32:
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OS << "f";
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break;
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case PTXRegisterType::F64:
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OS << "fd";
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break;
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}
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break;
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case PTXRegisterSpace::Return:
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OS << "ret";
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break;
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case PTXRegisterSpace::Argument:
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OS << "arg";
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break;
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}
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OS << RegOffset;
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}
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} // namespace llvm
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#endif
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