1652 lines
43 KiB
C++
1652 lines
43 KiB
C++
#ifndef BOOST_ATOMIC_DETAIL_GCC_X86_HPP
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#define BOOST_ATOMIC_DETAIL_GCC_X86_HPP
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// Copyright (c) 2009 Helge Bahmann
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// Copyright (c) 2012 Tim Blechmann
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//
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// Distributed under the Boost Software License, Version 1.0.
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// See accompanying file LICENSE_1_0.txt or copy at
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// http://www.boost.org/LICENSE_1_0.txt)
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#include <cstddef>
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#include <boost/cstdint.hpp>
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#include <boost/atomic/detail/config.hpp>
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#ifdef BOOST_ATOMIC_HAS_PRAGMA_ONCE
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#pragma once
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#endif
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namespace boost {
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namespace atomics {
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namespace detail {
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#if defined(__x86_64__) || defined(__SSE2__)
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# define BOOST_ATOMIC_X86_FENCE_INSTR "mfence\n"
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#else
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# define BOOST_ATOMIC_X86_FENCE_INSTR "lock ; addl $0, (%%esp)\n"
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#endif
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#define BOOST_ATOMIC_X86_PAUSE() __asm__ __volatile__ ("pause\n")
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inline void
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platform_fence_before(memory_order order)
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{
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switch(order)
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{
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case memory_order_relaxed:
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case memory_order_acquire:
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case memory_order_consume:
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break;
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case memory_order_release:
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case memory_order_acq_rel:
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__asm__ __volatile__ ("" ::: "memory");
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/* release */
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break;
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case memory_order_seq_cst:
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__asm__ __volatile__ ("" ::: "memory");
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/* seq */
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break;
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default:;
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}
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}
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inline void
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platform_fence_after(memory_order order)
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{
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switch(order)
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{
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case memory_order_relaxed:
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case memory_order_release:
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break;
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case memory_order_acquire:
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case memory_order_acq_rel:
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__asm__ __volatile__ ("" ::: "memory");
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/* acquire */
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break;
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case memory_order_consume:
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/* consume */
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break;
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case memory_order_seq_cst:
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__asm__ __volatile__ ("" ::: "memory");
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/* seq */
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break;
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default:;
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}
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}
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inline void
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platform_fence_after_load(memory_order order)
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{
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switch(order)
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{
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case memory_order_relaxed:
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case memory_order_release:
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break;
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case memory_order_acquire:
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case memory_order_acq_rel:
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__asm__ __volatile__ ("" ::: "memory");
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break;
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case memory_order_consume:
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break;
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case memory_order_seq_cst:
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__asm__ __volatile__ ("" ::: "memory");
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break;
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default:;
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}
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}
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inline void
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platform_fence_before_store(memory_order order)
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{
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switch(order)
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{
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case memory_order_relaxed:
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case memory_order_acquire:
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case memory_order_consume:
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break;
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case memory_order_release:
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case memory_order_acq_rel:
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__asm__ __volatile__ ("" ::: "memory");
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/* release */
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break;
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case memory_order_seq_cst:
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__asm__ __volatile__ ("" ::: "memory");
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/* seq */
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break;
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default:;
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}
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}
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inline void
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platform_fence_after_store(memory_order order)
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{
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switch(order)
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{
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case memory_order_relaxed:
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case memory_order_release:
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break;
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case memory_order_acquire:
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case memory_order_acq_rel:
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__asm__ __volatile__ ("" ::: "memory");
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/* acquire */
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break;
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case memory_order_consume:
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/* consume */
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break;
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case memory_order_seq_cst:
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__asm__ __volatile__ ("" ::: "memory");
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/* seq */
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break;
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default:;
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}
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}
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}
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}
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class atomic_flag
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{
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private:
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atomic_flag(const atomic_flag &) /* = delete */ ;
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atomic_flag & operator=(const atomic_flag &) /* = delete */ ;
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uint32_t v_;
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public:
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atomic_flag(void) : v_(0) {}
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bool
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test_and_set(memory_order order = memory_order_seq_cst) volatile
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{
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uint32_t v = 1;
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atomics::detail::platform_fence_before(order);
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__asm__ __volatile__ (
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"xchgl %0, %1"
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: "+r" (v), "+m" (v_)
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);
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atomics::detail::platform_fence_after(order);
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return v;
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}
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void
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clear(memory_order order = memory_order_seq_cst) volatile
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{
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if (order == memory_order_seq_cst) {
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uint32_t v = 0;
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__asm__ __volatile__ (
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"xchgl %0, %1"
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: "+r" (v), "+m" (v_)
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);
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} else {
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atomics::detail::platform_fence_before(order);
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v_ = 0;
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}
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}
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};
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} /* namespace boost */
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#define BOOST_ATOMIC_FLAG_LOCK_FREE 2
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#include <boost/atomic/detail/base.hpp>
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#if !defined(BOOST_ATOMIC_FORCE_FALLBACK)
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#define BOOST_ATOMIC_CHAR_LOCK_FREE 2
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#define BOOST_ATOMIC_CHAR16_T_LOCK_FREE 2
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#define BOOST_ATOMIC_CHAR32_T_LOCK_FREE 2
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#define BOOST_ATOMIC_WCHAR_T_LOCK_FREE 2
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#define BOOST_ATOMIC_SHORT_LOCK_FREE 2
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#define BOOST_ATOMIC_INT_LOCK_FREE 2
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#define BOOST_ATOMIC_LONG_LOCK_FREE 2
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#if defined(__x86_64__)
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#define BOOST_ATOMIC_LLONG_LOCK_FREE 2
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#else
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#define BOOST_ATOMIC_LLONG_LOCK_FREE 1
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#endif
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#define BOOST_ATOMIC_POINTER_LOCK_FREE 2
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#define BOOST_ATOMIC_BOOL_LOCK_FREE 2
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namespace boost {
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#define BOOST_ATOMIC_THREAD_FENCE 2
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inline void
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atomic_thread_fence(memory_order order)
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{
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switch(order)
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{
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case memory_order_relaxed:
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break;
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case memory_order_release:
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__asm__ __volatile__ ("" ::: "memory");
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break;
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case memory_order_acquire:
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__asm__ __volatile__ ("" ::: "memory");
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break;
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case memory_order_acq_rel:
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__asm__ __volatile__ ("" ::: "memory");
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break;
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case memory_order_consume:
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break;
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case memory_order_seq_cst:
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__asm__ __volatile__ (BOOST_ATOMIC_X86_FENCE_INSTR ::: "memory");
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break;
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default:;
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}
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}
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#define BOOST_ATOMIC_SIGNAL_FENCE 2
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inline void
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atomic_signal_fence(memory_order)
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{
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__asm__ __volatile__ ("" ::: "memory");
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}
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namespace atomics {
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namespace detail {
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template<typename T, bool Sign>
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class base_atomic<T, int, 1, Sign> {
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typedef base_atomic this_type;
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typedef T value_type;
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typedef T difference_type;
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public:
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explicit base_atomic(value_type v) : v_(v) {}
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base_atomic(void) {}
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void
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store(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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if (order != memory_order_seq_cst) {
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platform_fence_before(order);
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const_cast<volatile value_type &>(v_) = v;
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} else {
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exchange(v, order);
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}
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}
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value_type
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load(memory_order order = memory_order_seq_cst) const volatile
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{
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value_type v = const_cast<const volatile value_type &>(v_);
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platform_fence_after_load(order);
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return v;
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}
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value_type
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fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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platform_fence_before(order);
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__asm__ (
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"lock ; xaddb %0, %1"
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: "+q" (v), "+m" (v_)
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);
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platform_fence_after(order);
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return v;
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}
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value_type
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fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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return fetch_add(-v, order);
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}
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value_type
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exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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platform_fence_before(order);
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__asm__ (
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"xchgb %0, %1"
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: "+q" (v), "+m" (v_)
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);
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platform_fence_after(order);
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return v;
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}
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bool
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compare_exchange_strong(
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value_type & expected,
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value_type desired,
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memory_order success_order,
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memory_order failure_order) volatile
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{
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value_type previous = expected;
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platform_fence_before(success_order);
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__asm__ (
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"lock ; cmpxchgb %2, %1"
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: "+a" (previous), "+m" (v_)
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: "q" (desired)
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);
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bool success = (previous == expected);
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if (success)
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platform_fence_after(success_order);
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else
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platform_fence_after(failure_order);
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expected = previous;
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return success;
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}
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bool
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compare_exchange_weak(
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value_type & expected,
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value_type desired,
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memory_order success_order,
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memory_order failure_order) volatile
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{
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return compare_exchange_strong(expected, desired, success_order, failure_order);
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}
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value_type
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fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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value_type tmp = load(memory_order_relaxed);
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for(; !compare_exchange_weak(tmp, tmp & v, order, memory_order_relaxed);)
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{
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BOOST_ATOMIC_X86_PAUSE();
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}
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return tmp;
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}
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value_type
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fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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value_type tmp = load(memory_order_relaxed);
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for (; !compare_exchange_weak(tmp, tmp | v, order, memory_order_relaxed);)
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{
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BOOST_ATOMIC_X86_PAUSE();
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}
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return tmp;
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}
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value_type
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fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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value_type tmp = load(memory_order_relaxed);
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for (; !compare_exchange_weak(tmp, tmp ^ v, order, memory_order_relaxed);)
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{
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BOOST_ATOMIC_X86_PAUSE();
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}
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return tmp;
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}
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bool
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is_lock_free(void) const volatile
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{
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return true;
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}
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BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
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private:
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base_atomic(const base_atomic &) /* = delete */ ;
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void operator=(const base_atomic &) /* = delete */ ;
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value_type v_;
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};
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template<typename T, bool Sign>
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class base_atomic<T, int, 2, Sign> {
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typedef base_atomic this_type;
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typedef T value_type;
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typedef T difference_type;
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public:
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explicit base_atomic(value_type v) : v_(v) {}
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base_atomic(void) {}
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void
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store(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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if (order != memory_order_seq_cst) {
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platform_fence_before(order);
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const_cast<volatile value_type &>(v_) = v;
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} else {
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exchange(v, order);
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}
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}
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value_type
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load(memory_order order = memory_order_seq_cst) const volatile
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{
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value_type v = const_cast<const volatile value_type &>(v_);
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platform_fence_after_load(order);
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return v;
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}
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value_type
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fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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platform_fence_before(order);
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__asm__ (
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"lock ; xaddw %0, %1"
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: "+q" (v), "+m" (v_)
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);
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platform_fence_after(order);
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return v;
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}
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value_type
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fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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return fetch_add(-v, order);
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}
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value_type
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exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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platform_fence_before(order);
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__asm__ (
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"xchgw %0, %1"
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: "+q" (v), "+m" (v_)
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);
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platform_fence_after(order);
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return v;
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}
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bool
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compare_exchange_strong(
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value_type & expected,
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value_type desired,
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memory_order success_order,
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memory_order failure_order) volatile
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{
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value_type previous = expected;
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platform_fence_before(success_order);
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__asm__ (
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"lock ; cmpxchgw %2, %1"
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: "+a" (previous), "+m" (v_)
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: "q" (desired)
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);
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bool success = (previous == expected);
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if (success)
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platform_fence_after(success_order);
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else
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platform_fence_after(failure_order);
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expected = previous;
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return success;
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}
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bool
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compare_exchange_weak(
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value_type & expected,
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value_type desired,
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memory_order success_order,
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memory_order failure_order) volatile
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{
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return compare_exchange_strong(expected, desired, success_order, failure_order);
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}
|
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|
|
value_type
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fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile
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{
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value_type tmp = load(memory_order_relaxed);
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for (; !compare_exchange_weak(tmp, tmp & v, order, memory_order_relaxed);)
|
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{
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BOOST_ATOMIC_X86_PAUSE();
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}
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return tmp;
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}
|
|
|
|
value_type
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fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
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value_type tmp = load(memory_order_relaxed);
|
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for (; !compare_exchange_weak(tmp, tmp | v, order, memory_order_relaxed);)
|
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{
|
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BOOST_ATOMIC_X86_PAUSE();
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}
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return tmp;
|
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}
|
|
|
|
value_type
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fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp ^ v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
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return tmp;
|
|
}
|
|
|
|
bool
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is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T, int, 4, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T value_type;
|
|
typedef T difference_type;
|
|
public:
|
|
explicit base_atomic(value_type v) : v_(v) {}
|
|
base_atomic(void) {}
|
|
|
|
void
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|
store(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
platform_fence_before(order);
|
|
const_cast<volatile value_type &>(v_) = v;
|
|
} else {
|
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exchange(v, order);
|
|
}
|
|
}
|
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|
|
value_type
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load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
value_type v = const_cast<const volatile value_type &>(v_);
|
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platform_fence_after_load(order);
|
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return v;
|
|
}
|
|
|
|
value_type
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fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"lock ; xaddl %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
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);
|
|
platform_fence_after(order);
|
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return v;
|
|
}
|
|
|
|
value_type
|
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fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
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return fetch_add(-v, order);
|
|
}
|
|
|
|
value_type
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exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgl %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
value_type previous = expected;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgl %2, %1"
|
|
: "+a" (previous), "+m" (v_)
|
|
: "r" (desired)
|
|
);
|
|
bool success = (previous == expected);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
expected = previous;
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
value_type
|
|
fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp & v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return tmp;
|
|
}
|
|
|
|
value_type
|
|
fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp | v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return tmp;
|
|
}
|
|
|
|
value_type
|
|
fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp ^ v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return tmp;
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
#if defined(__x86_64__)
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T, int, 8, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T value_type;
|
|
typedef T difference_type;
|
|
public:
|
|
explicit base_atomic(value_type v) : v_(v) {}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
platform_fence_before(order);
|
|
const_cast<volatile value_type &>(v_) = v;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
value_type v = const_cast<const volatile value_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
fetch_add(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"lock ; xaddq %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
fetch_sub(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
return fetch_add(-v, order);
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgq %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
value_type previous = expected;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgq %2, %1"
|
|
: "+a" (previous), "+m" (v_)
|
|
: "r" (desired)
|
|
);
|
|
bool success = (previous == expected);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
expected = previous;
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
value_type
|
|
fetch_and(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp & v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return tmp;
|
|
}
|
|
|
|
value_type
|
|
fetch_or(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp | v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return tmp;
|
|
}
|
|
|
|
value_type
|
|
fetch_xor(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
value_type tmp = load(memory_order_relaxed);
|
|
for (; !compare_exchange_weak(tmp, tmp ^ v, order, memory_order_relaxed);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return tmp;
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_INTEGRAL_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
#endif
|
|
|
|
/* pointers */
|
|
|
|
#if !defined(__x86_64__)
|
|
|
|
template<bool Sign>
|
|
class base_atomic<void *, void *, 4, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef void * value_type;
|
|
public:
|
|
explicit base_atomic(value_type v) : v_(v) {}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
platform_fence_before(order);
|
|
const_cast<volatile value_type &>(v_) = v;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
value_type v = const_cast<const volatile value_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
return v;
|
|
}
|
|
|
|
value_type exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgl %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
bool compare_exchange_strong(value_type & expected, value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
value_type previous = expected;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgl %2, %1"
|
|
: "+a" (previous), "+m" (v_)
|
|
: "r" (desired)
|
|
);
|
|
bool success = (previous == expected);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
expected = previous;
|
|
return success;
|
|
}
|
|
|
|
bool compare_exchange_weak(value_type & expected, value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_BASE_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T *, void *, 4, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T * value_type;
|
|
typedef ptrdiff_t difference_type;
|
|
public:
|
|
explicit base_atomic(value_type v) : v_(v) {}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
platform_fence_before(order);
|
|
const_cast<volatile value_type &>(v_) = v;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
value_type v = const_cast<const volatile value_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgl %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
value_type previous = expected;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgl %2, %1"
|
|
: "+a" (previous), "+m" (v_)
|
|
: "r" (desired)
|
|
);
|
|
bool success = (previous == expected);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
expected = previous;
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
value_type
|
|
fetch_add(difference_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
v = v * sizeof(*v_);
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"lock ; xaddl %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return reinterpret_cast<value_type>(v);
|
|
}
|
|
|
|
value_type
|
|
fetch_sub(difference_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
return fetch_add(-v, order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_POINTER_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
#else
|
|
|
|
template<bool Sign>
|
|
class base_atomic<void *, void *, 8, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef void * value_type;
|
|
public:
|
|
explicit base_atomic(value_type v) : v_(v) {}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
platform_fence_before(order);
|
|
const_cast<volatile value_type &>(v_) = v;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
value_type v = const_cast<const volatile value_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
return v;
|
|
}
|
|
|
|
value_type exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgq %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
bool compare_exchange_strong(value_type & expected, value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
value_type previous = expected;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgq %2, %1"
|
|
: "+a" (previous), "+m" (v_)
|
|
: "r" (desired)
|
|
);
|
|
bool success = (previous == expected);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
expected = previous;
|
|
return success;
|
|
}
|
|
|
|
bool compare_exchange_weak(value_type & expected, value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_BASE_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T *, void *, 8, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T * value_type;
|
|
typedef ptrdiff_t difference_type;
|
|
public:
|
|
explicit base_atomic(value_type v) : v_(v) {}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
platform_fence_before(order);
|
|
const_cast<volatile value_type &>(v_) = v;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
value_type v = const_cast<const volatile value_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgq %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return v;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
value_type previous = expected;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgq %2, %1"
|
|
: "+a" (previous), "+m" (v_)
|
|
: "r" (desired)
|
|
);
|
|
bool success = (previous == expected);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
expected = previous;
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
value_type
|
|
fetch_add(difference_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
v = v * sizeof(*v_);
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"lock ; xaddq %0, %1"
|
|
: "+r" (v), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
return reinterpret_cast<value_type>(v);
|
|
}
|
|
|
|
value_type
|
|
fetch_sub(difference_type v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
return fetch_add(-v, order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_POINTER_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
value_type v_;
|
|
};
|
|
|
|
#endif
|
|
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T, void, 1, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T value_type;
|
|
typedef uint8_t storage_type;
|
|
public:
|
|
explicit base_atomic(value_type const& v)
|
|
{
|
|
memcpy(&v_, &v, sizeof(value_type));
|
|
}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
storage_type tmp;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
const_cast<volatile storage_type &>(v_) = tmp;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
storage_type tmp = const_cast<volatile storage_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
value_type v;
|
|
memcpy(&v, &tmp, sizeof(value_type));
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
storage_type tmp;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgb %0, %1"
|
|
: "+q" (tmp), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
value_type res;
|
|
memcpy(&res, &tmp, sizeof(value_type));
|
|
return res;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
storage_type expected_s, desired_s;
|
|
memcpy(&expected_s, &expected, sizeof(value_type));
|
|
memcpy(&desired_s, &desired, sizeof(value_type));
|
|
storage_type previous_s = expected_s;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgb %2, %1"
|
|
: "+a" (previous_s), "+m" (v_)
|
|
: "q" (desired_s)
|
|
);
|
|
bool success = (previous_s == expected_s);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
memcpy(&expected, &previous_s, sizeof(value_type));
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_BASE_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
storage_type v_;
|
|
};
|
|
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T, void, 2, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T value_type;
|
|
typedef uint16_t storage_type;
|
|
public:
|
|
explicit base_atomic(value_type const& v)
|
|
{
|
|
memcpy(&v_, &v, sizeof(value_type));
|
|
}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
storage_type tmp;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
const_cast<volatile storage_type &>(v_) = tmp;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
storage_type tmp = const_cast<volatile storage_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
value_type v;
|
|
memcpy(&v, &tmp, sizeof(value_type));
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
storage_type tmp;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgw %0, %1"
|
|
: "+q" (tmp), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
value_type res;
|
|
memcpy(&res, &tmp, sizeof(value_type));
|
|
return res;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
storage_type expected_s, desired_s;
|
|
memcpy(&expected_s, &expected, sizeof(value_type));
|
|
memcpy(&desired_s, &desired, sizeof(value_type));
|
|
storage_type previous_s = expected_s;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgw %2, %1"
|
|
: "+a" (previous_s), "+m" (v_)
|
|
: "q" (desired_s)
|
|
);
|
|
bool success = (previous_s == expected_s);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
memcpy(&expected, &previous_s, sizeof(value_type));
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_BASE_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
storage_type v_;
|
|
};
|
|
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T, void, 4, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T value_type;
|
|
typedef uint32_t storage_type;
|
|
public:
|
|
explicit base_atomic(value_type const& v) : v_(0)
|
|
{
|
|
memcpy(&v_, &v, sizeof(value_type));
|
|
}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
storage_type tmp = 0;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
const_cast<volatile storage_type &>(v_) = tmp;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
storage_type tmp = const_cast<volatile storage_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
value_type v;
|
|
memcpy(&v, &tmp, sizeof(value_type));
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
storage_type tmp = 0;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgl %0, %1"
|
|
: "+q" (tmp), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
value_type res;
|
|
memcpy(&res, &tmp, sizeof(value_type));
|
|
return res;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
storage_type expected_s = 0, desired_s = 0;
|
|
memcpy(&expected_s, &expected, sizeof(value_type));
|
|
memcpy(&desired_s, &desired, sizeof(value_type));
|
|
storage_type previous_s = expected_s;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgl %2, %1"
|
|
: "+a" (previous_s), "+m" (v_)
|
|
: "q" (desired_s)
|
|
);
|
|
bool success = (previous_s == expected_s);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
memcpy(&expected, &previous_s, sizeof(value_type));
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_BASE_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
storage_type v_;
|
|
};
|
|
|
|
#if defined(__x86_64__)
|
|
template<typename T, bool Sign>
|
|
class base_atomic<T, void, 8, Sign> {
|
|
typedef base_atomic this_type;
|
|
typedef T value_type;
|
|
typedef uint64_t storage_type;
|
|
public:
|
|
explicit base_atomic(value_type const& v) : v_(0)
|
|
{
|
|
memcpy(&v_, &v, sizeof(value_type));
|
|
}
|
|
base_atomic(void) {}
|
|
|
|
void
|
|
store(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
if (order != memory_order_seq_cst) {
|
|
storage_type tmp = 0;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
const_cast<volatile storage_type &>(v_) = tmp;
|
|
} else {
|
|
exchange(v, order);
|
|
}
|
|
}
|
|
|
|
value_type
|
|
load(memory_order order = memory_order_seq_cst) const volatile
|
|
{
|
|
storage_type tmp = const_cast<volatile storage_type &>(v_);
|
|
platform_fence_after_load(order);
|
|
value_type v;
|
|
memcpy(&v, &tmp, sizeof(value_type));
|
|
return v;
|
|
}
|
|
|
|
value_type
|
|
exchange(value_type const& v, memory_order order = memory_order_seq_cst) volatile
|
|
{
|
|
storage_type tmp = 0;
|
|
memcpy(&tmp, &v, sizeof(value_type));
|
|
platform_fence_before(order);
|
|
__asm__ (
|
|
"xchgq %0, %1"
|
|
: "+q" (tmp), "+m" (v_)
|
|
);
|
|
platform_fence_after(order);
|
|
value_type res;
|
|
memcpy(&res, &tmp, sizeof(value_type));
|
|
return res;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_strong(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
storage_type expected_s = 0, desired_s = 0;
|
|
memcpy(&expected_s, &expected, sizeof(value_type));
|
|
memcpy(&desired_s, &desired, sizeof(value_type));
|
|
storage_type previous_s = expected_s;
|
|
platform_fence_before(success_order);
|
|
__asm__ (
|
|
"lock ; cmpxchgq %2, %1"
|
|
: "+a" (previous_s), "+m" (v_)
|
|
: "q" (desired_s)
|
|
);
|
|
bool success = (previous_s == expected_s);
|
|
if (success)
|
|
platform_fence_after(success_order);
|
|
else
|
|
platform_fence_after(failure_order);
|
|
memcpy(&expected, &previous_s, sizeof(value_type));
|
|
return success;
|
|
}
|
|
|
|
bool
|
|
compare_exchange_weak(
|
|
value_type & expected,
|
|
value_type const& desired,
|
|
memory_order success_order,
|
|
memory_order failure_order) volatile
|
|
{
|
|
return compare_exchange_strong(expected, desired, success_order, failure_order);
|
|
}
|
|
|
|
bool
|
|
is_lock_free(void) const volatile
|
|
{
|
|
return true;
|
|
}
|
|
|
|
BOOST_ATOMIC_DECLARE_BASE_OPERATORS
|
|
private:
|
|
base_atomic(const base_atomic &) /* = delete */ ;
|
|
void operator=(const base_atomic &) /* = delete */ ;
|
|
storage_type v_;
|
|
};
|
|
#endif
|
|
|
|
#if !defined(__x86_64__) && (defined(__i686__) || defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8))
|
|
|
|
template<typename T>
|
|
inline bool
|
|
platform_cmpxchg64_strong(T & expected, T desired, volatile T * ptr)
|
|
{
|
|
#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
|
|
const T oldval = __sync_val_compare_and_swap(ptr, expected, desired);
|
|
const bool result = (oldval == expected);
|
|
expected = oldval;
|
|
return result;
|
|
#else
|
|
int scratch;
|
|
T prev = expected;
|
|
/* Make sure ebx is saved and restored properly in case
|
|
this object is compiled as "position independent". Since
|
|
programmers on x86 tend to forget specifying -DPIC or
|
|
similar, always assume PIC.
|
|
|
|
To make this work uniformly even in the non-PIC case,
|
|
setup register constraints such that ebx can not be
|
|
used by accident e.g. as base address for the variable
|
|
to be modified. Accessing "scratch" should always be okay,
|
|
as it can only be placed on the stack (and therefore
|
|
accessed through ebp or esp only).
|
|
|
|
In theory, could push/pop ebx onto/off the stack, but movs
|
|
to a prepared stack slot turn out to be faster. */
|
|
__asm__ __volatile__ (
|
|
"movl %%ebx, %1\n"
|
|
"movl %2, %%ebx\n"
|
|
"lock; cmpxchg8b 0(%4)\n"
|
|
"movl %1, %%ebx\n"
|
|
: "=A" (prev), "=m" (scratch)
|
|
: "D" ((int)desired), "c" ((int)(desired >> 32)), "S" (ptr), "0" (prev)
|
|
: "memory");
|
|
bool success = (prev == expected);
|
|
expected = prev;
|
|
return success;
|
|
#endif
|
|
}
|
|
|
|
template<typename T>
|
|
inline void
|
|
platform_store64(T value, volatile T * ptr)
|
|
{
|
|
T expected = *ptr;
|
|
for (; !platform_cmpxchg64_strong(expected, value, ptr);)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
}
|
|
|
|
template<typename T>
|
|
inline T
|
|
platform_load64(const volatile T * ptr)
|
|
{
|
|
T expected = *ptr;
|
|
for (; !platform_cmpxchg64_strong(expected, expected, const_cast<volatile T*>(ptr));)
|
|
{
|
|
BOOST_ATOMIC_X86_PAUSE();
|
|
}
|
|
return expected;
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
}
|
|
}
|
|
|
|
/* pull in 64-bit atomic type using cmpxchg8b above */
|
|
#if !defined(__x86_64__) && (defined(__i686__) || defined (__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8))
|
|
#include <boost/atomic/detail/cas64strong.hpp>
|
|
#endif
|
|
|
|
#endif /* !defined(BOOST_ATOMIC_FORCE_FALLBACK) */
|
|
|
|
#endif
|