124 lines
3.8 KiB
C++
124 lines
3.8 KiB
C++
//===-- MipsExpandPseudo.cpp - Expand Pseudo Instructions ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass expands pseudo instructions into target instructions after register
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// allocation but before post-RA scheduling.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "mips-expand-pseudo"
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#include "Mips.h"
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#include "MipsTargetMachine.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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namespace {
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struct MipsExpandPseudo : public MachineFunctionPass {
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TargetMachine &TM;
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const TargetInstrInfo *TII;
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static char ID;
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MipsExpandPseudo(TargetMachine &tm)
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: MachineFunctionPass(ID), TM(tm), TII(tm.getInstrInfo()) { }
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virtual const char *getPassName() const {
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return "Mips PseudoInstrs Expansion";
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}
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bool runOnMachineFunction(MachineFunction &F);
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bool runOnMachineBasicBlock(MachineBasicBlock &MBB);
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private:
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void ExpandBuildPairF64(MachineBasicBlock&, MachineBasicBlock::iterator);
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void ExpandExtractElementF64(MachineBasicBlock&,
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MachineBasicBlock::iterator);
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};
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char MipsExpandPseudo::ID = 0;
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} // end of anonymous namespace
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bool MipsExpandPseudo::runOnMachineFunction(MachineFunction& F) {
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bool Changed = false;
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for (MachineFunction::iterator I = F.begin(); I != F.end(); ++I)
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Changed |= runOnMachineBasicBlock(*I);
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return Changed;
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}
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bool MipsExpandPseudo::runOnMachineBasicBlock(MachineBasicBlock& MBB) {
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bool Changed = false;
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for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end();) {
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const MCInstrDesc& MCid = I->getDesc();
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switch(MCid.getOpcode()) {
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default:
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++I;
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continue;
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case Mips::SETGP2:
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// Convert "setgp2 $globalreg, $t9" to "addu $globalreg, $v0, $t9"
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BuildMI(MBB, I, I->getDebugLoc(), TII->get(Mips::ADDu),
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I->getOperand(0).getReg())
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.addReg(Mips::V0).addReg(I->getOperand(1).getReg());
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break;
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case Mips::BuildPairF64:
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ExpandBuildPairF64(MBB, I);
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break;
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case Mips::ExtractElementF64:
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ExpandExtractElementF64(MBB, I);
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break;
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}
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// delete original instr
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MBB.erase(I++);
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Changed = true;
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}
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return Changed;
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}
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void MipsExpandPseudo::ExpandBuildPairF64(MachineBasicBlock& MBB,
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MachineBasicBlock::iterator I) {
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unsigned DstReg = I->getOperand(0).getReg();
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unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg();
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const MCInstrDesc& Mtc1Tdd = TII->get(Mips::MTC1);
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DebugLoc dl = I->getDebugLoc();
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const uint16_t* SubReg =
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TM.getRegisterInfo()->getSubRegisters(DstReg);
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// mtc1 Lo, $fp
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// mtc1 Hi, $fp + 1
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BuildMI(MBB, I, dl, Mtc1Tdd, *SubReg).addReg(LoReg);
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BuildMI(MBB, I, dl, Mtc1Tdd, *(SubReg + 1)).addReg(HiReg);
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}
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void MipsExpandPseudo::ExpandExtractElementF64(MachineBasicBlock& MBB,
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MachineBasicBlock::iterator I) {
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unsigned DstReg = I->getOperand(0).getReg();
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unsigned SrcReg = I->getOperand(1).getReg();
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unsigned N = I->getOperand(2).getImm();
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const MCInstrDesc& Mfc1Tdd = TII->get(Mips::MFC1);
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DebugLoc dl = I->getDebugLoc();
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const uint16_t* SubReg = TM.getRegisterInfo()->getSubRegisters(SrcReg);
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BuildMI(MBB, I, dl, Mfc1Tdd, DstReg).addReg(*(SubReg + N));
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}
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/// createMipsMipsExpandPseudoPass - Returns a pass that expands pseudo
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/// instrs into real instrs
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FunctionPass *llvm::createMipsExpandPseudoPass(MipsTargetMachine &tm) {
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return new MipsExpandPseudo(tm);
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}
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