62 lines
2.2 KiB
C
62 lines
2.2 KiB
C
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//===-- Thumb1InstrInfo.h - Thumb-1 Instruction Information -----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Thumb-1 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef THUMB1INSTRUCTIONINFO_H
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#define THUMB1INSTRUCTIONINFO_H
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#include "ARM.h"
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#include "ARMBaseInstrInfo.h"
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#include "Thumb1RegisterInfo.h"
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namespace llvm {
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class ARMSubtarget;
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class Thumb1InstrInfo : public ARMBaseInstrInfo {
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Thumb1RegisterInfo RI;
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public:
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explicit Thumb1InstrInfo(const ARMSubtarget &STI);
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/// getNoopForMachoTarget - Return the noop instruction to use for a noop.
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void getNoopForMachoTarget(MCInst &NopInst) const;
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// Return the non-pre/post incrementing version of 'Opc'. Return 0
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// if there is not such an opcode.
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unsigned getUnindexedOpcode(unsigned Opc) const;
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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const Thumb1RegisterInfo &getRegisterInfo() const { return RI; }
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void copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, DebugLoc DL,
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unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const;
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const;
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};
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}
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#endif // THUMB1INSTRUCTIONINFO_H
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