From 879ee19a69af24dbd259d8151ae4afeff9307006 Mon Sep 17 00:00:00 2001 From: Austen Adler Date: Fri, 24 Feb 2023 00:47:33 -0500 Subject: [PATCH] Cleanup cell id v0 logic --- src/lib.rs | 31 +++++++++++++++++-------------- src/v0.rs | 49 +++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 64 insertions(+), 16 deletions(-) diff --git a/src/lib.rs b/src/lib.rs index f9ca649..e9887bb 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -10,6 +10,7 @@ use std::{ ops::{Add, AddAssign}, str::FromStr, }; +use v0::UnpackedCellID; mod conversions; use thiserror::Error; @@ -172,25 +173,26 @@ impl Address<'_> { pub fn as_cell_id(&self) -> CellID { match self.version { Version::V0 => { - let ten_bits = 0b1111_1111_11; - let thirteen_bits = 0b1111_1111_1111_1; - let mut ret = 0b0; + UnpackedCellID::from(self).into() + // let ten_bits = 0b1111_1111_11; + // let thirteen_bits = 0b1111_1111_1111_1; + // let mut ret = 0b0; - // Add words in reverse order - for word in self.words.iter().rev() { - ret = (ret << 13) | (word.number as u64 & thirteen_bits); - } + // // Add words in reverse order + // for word in self.words.iter().rev() { + // ret = (ret << 13) | (word.number as u64 & thirteen_bits); + // } - // Add the number - ret = (ret << 10) | (self.number as u64 & ten_bits); + // // Add the number + // ret = (ret << 10) | (self.number as u64 & ten_bits); - // Add the final bit - ret = (ret << 1) | 0b1; + // // Add the final bit + // ret = (ret << 1) | 0b1; - // Shift the whole id left by the number of unused levels * 2 - ret = ret << ((s2::cellid::MAX_LEVEL - CELLID_LEVEL as u64) * 2); + // // Shift the whole id left by the number of unused levels * 2 + // ret = ret << ((s2::cellid::MAX_LEVEL - CELLID_LEVEL as u64) * 2); - CellID(ret) + // CellID(ret) } } } @@ -199,6 +201,7 @@ impl Address<'_> { /// Extracts a version number from a number /// /// The version number is set by the two bits 11 and 12 +// TODO: impl TryFrom ? fn extract_version(number: Number) -> Result { match ((number >> 10) & 0b11) as u8 { 0 => Ok(Version::V0), diff --git a/src/v0.rs b/src/v0.rs index 3dfb30b..14b81fb 100644 --- a/src/v0.rs +++ b/src/v0.rs @@ -1,5 +1,5 @@ -use crate::{conversions, Address, Version}; -use std::ops::RangeInclusive; +use crate::{conversions, Address, Version, CELLID_LEVEL}; +use std::ops::{Add, RangeInclusive}; use words::NUMBER_TO_WORDS; use s2::{cell::Cell, cellid::CellID}; @@ -43,6 +43,51 @@ impl From for Address<'_> { } } +impl From<&Address<'_>> for UnpackedCellID { + fn from(value: &Address) -> Self { + Self { + number_bits: value.number as u16, + word0_bits: value.words[0].number as u16, + word1_bits: value.words[1].number as u16, + word2_bits: value.words[2].number as u16, + } + } +} + +impl From for u64 { + fn from(value: UnpackedCellID) -> Self { + let ten_bits = 0b1111_1111_11; + let thirteen_bits = 0b1111_1111_1111_1; + let mut ret = 0b0; + + // Add words in reverse order + ret = (ret << 13) | (value.word2_bits as u64 & thirteen_bits); + ret = (ret << 13) | (value.word1_bits as u64 & thirteen_bits); + ret = (ret << 13) | (value.word0_bits as u64 & thirteen_bits); + + // for word in self.words.iter().rev() { + // ret = (ret << 13) | (word.number as u64 & thirteen_bits); + // } + + // Add the number + ret = (ret << 10) | (value.number_bits as u64 & ten_bits); + + // Add the final bit + ret = (ret << 1) | 0b1; + + // Shift the whole id left by the number of unused levels * 2 + ret = ret << ((s2::cellid::MAX_LEVEL - CELLID_LEVEL as u64) * 2); + + ret + } +} + +impl From for CellID { + fn from(value: UnpackedCellID) -> Self { + CellID(value.into()) + } +} + // impl>> From for UnpackedCellID { // fn from(addr: A) -> Self { // let number_bits = addr.